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INTEGRATED CIRCUITS
DATA SHEET
TZA3033 SDH/SONET STM1/OC3 transimpedance amplifier
Product specification Supersedes data of 2000 Sep 29 2002 Sep 06
Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
FEATURES * Low equivalent input noise of 1 pA/Hz (typical) * Wide dynamic range from 0.25 A to 1.6 mA (typical) * Differential transimpedance of 44 k * Bandwidth typical 130 MHz * Differential outputs * On-chip Automatic Gain Control (AGC) * No external components required * Single supply voltage from 3.0 to 5.5 V * Bias voltage for PIN diode * Pin compatible with SA5223 * Goldplated version available for direct placement of photodiode on die. ORDERING INFORMATION TYPE NUMBER TZA3033T TZA3033U TZA3033U/G PACKAGE NAME SO8 - - DESCRIPTION plastic small outline package; 8 leads; body width 3.9 mm bare die in waffle pack carriers; die dimensions 1.030 x 1.300 mm bare die with goldplating in waffle pack carriers; die dimensions 1.030 x 1.300 mm APPLICATIONS
TZA3033
* Digital fibre optic receiver in short, medium and long haul optical telecommunications transmission systems or in high speed data networks * Wideband RF gain block. GENERAL DESCRIPTION The TZA3033 is a low-noise transimpedance amplifier with AGC designed to be used in STM1/OC3 fibre optic links. It amplifies the current generated by a photo detector (PIN diode or avalanche photodiode) and converts it to a differential output voltage.
VERSION SOT96-1 - -
2002 Sep 06
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Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
BLOCK DIAGRAM
TZA3033
handbook, full pagewidth
AGC(1)
VCC 8 (13, 14)
VCC 1 nF DREF 1 (1) 65 pF IPhoto 3 (5) A1 low noise amplifier 250 GAIN CONTROL
(15)
peak detector
(12) 7 A2 single-ended to differential converter (11) 6
OUTQ OUT
TZA3033
BIASING 3 2, 4, 5 (3, 4, 7, 8, 9, 10)
MGR368
GND The numbers in brackets refer to the pad numbers of the bare die version. (1) AGC analog I/O is only available on the TZA3033U (pad 15).
Fig.1 Block diagram.
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Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
PINNING SYMBOL DREF TESTA GND IPhoto TESTB GND GND OUT OUTQ VCC AGC Note 1. For the TZA3033U/G this pad is connected to the gold layer on top of the passivation layer. PIN PAD TZA3033T TZA3033U 1 - 2 3 - 4 5 6 7 8 - 1 2 3, 4 5 6 7, 8 9, 10 11 12 13, 14 15 TYPE analog output - ground analog input - ground ground output output supply input/output DESCRIPTION
TZA3033
bias voltage for PIN diode; cathode should be connected to this pin; note 1 for test purposes only; to be left open in application ground current input; anode of PIN diode should be connected to this pin; DC bias voltage is 1048 mV for test purposes only; to be left open in application ground ground data output; pin OUT goes HIGH when current flows into pin IPhoto data output; compliment of pin OUT supply voltage AGC analog I/O
handbook, halfpage
DREF 1 GND 2
8 VCC 7 OUTQ OUT GND
TZA3033T
IPhoto GND 3 4
MGR369
6 5
Fig.2 Pin configuration.
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Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
FUNCTIONAL DESCRIPTION The TZA3033 is a transimpedance amplifier intended for use in fibre optic links for signal recovery in STM1/OC3 applications. It amplifies the current generated by a photo detector (PIN diode or avalanche photodiode) and transforms it into a differential output voltage. The most important characteristics of the TZA3033 are high receiver sensitivity and wide dynamic range. High receiver sensitivity is achieved by minimizing noise in the transimpedance amplifier. The signal current generated by a PIN diode can vary between 0.25 A to 1.6 mA (p-p). An AGC loop (see Fig.1) is implemented to make it possible to handle such a wide dynamic range. The AGC loop increases the dynamic range of the receiver by reducing the feedback resistance of the preamplifier.
TZA3033
The AGC loop hold capacitor is integrated on-chip, so an external capacitor is not needed for AGC. The AGC voltage can be monitored at pad 15 on the bare die (TZA3033U). Pad 15 is not bonded in the packaged device (TZA3033T). This pad can be left unconnected during normal operation. It can also be used to force an external AGC voltage. If pad 15 (AGC) is connected to VCC, the internal AGC loop is disabled and the receiver gain is at a maximum. The maximum input current is then approximately 10 A. A differential amplifier converts the output of the preamplifier to a differential voltage (see Fig.3). The logic level symbol definitions are shown in Fig.4.
handbook, full pagewidth
VCC 266 266 30 OUTQ 30 OUT 4.5 mA 2 mA 4.5 mA
MGT547
Fig.3 Data output circuit.
handbook, full pagewidth
VCC VO(max) VOQH VOH Vo(p-p) VOQL VOL VO(min) VOO
MGR243
Fig.4 Logic level symbol definitions for data outputs OUT and OUTQ.
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Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
PIN diode bias voltage DREF The transimpedance amplifier together with the PIN diode determine to a large extent the performance of an optical receiver. The key parameters of a transimpedance amplifier like sensitivity, bandwidth, and the Power Supply Rejection Ratio (PSSR), are especially influenced by how the PIN diode is connected to the input and the layout around the input pin. The total capacitance at the input pin is critical to obtain the highest sensitivity. It should be kept to a minimum by reducing the capacitor of the PIN diode and the parasitics around the input pin. The PIN diode should be placed very close to the IC to reduce the parasitics. Because the capacitance of the PIN diode depends on the reverse voltage across it, the reverse voltage should be selected as high as possible. The PIN diode can be connected to the input as shown in Fig.5. In Fig.5 the PIN diode is connected between DREF and IPhoto. Pin DREF provides an easy bias voltage for the PIN diode. The voltage at DREF is derived from VCC by a low-pass filter. The low-pass filter consisting of the internal resistor R1, the internal capacitor C1 and the external capacitor C2 rejects the supply voltage noise. The external capacitor C2 should be equal to or larger than 1 nF for a high PSRR. It is preferable to connect the cathode of the PIN diode to a voltage higher than VCC when such a voltage source is available on the board. In this case the DREF pin can be left unconnected. The reverse voltage across the PIN diode is 3.95 V (5 - 1.05 V) for a 5 V supply and 2.25 V (3.3 - 1.05 V) for a 3.3 V supply.
TZA3033
VCC R1 250 C1 65 pF 8
DREF 1 C2 1 nF Ii
IPhoto 3
TZA3033
MGT548
Fig.5 Connecting the PIN diode to the input.
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Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
AGC The TZA3033 transimpedance amplifier can handle input currents from 0.25 A to 1.6 mA. This means a dynamic range of 79 dB. At low input currents, the transimpedance must be high to obtain an adequate output voltage, and the noise should be suitably low to guarantee minimum bit error rate. At high input currents however, the transimpedance should be low to avoid pulse width distortion. This means that the gain of the amplifier has to vary depending on the input signal level to handle such a wide dynamic range. This is achieved in the TZA3033 by implementing an Automatic Gain Control (AGC) loop. The AGC loop consists of a peak detector, a hold capacitor and a gain control circuit. The peak amplitude of the signal is detected by the peak detector and stored on the hold capacitor. The voltage across the hold capacitor is compared to a threshold level. The threshold level is set at an input current of 2.5 A (p-p). AGC becomes active only for input signals larger than the threshold level. It is disabled for smaller signals. The transimpedance is then at its maximum value (44 k differential).
TZA3033
When the AGC is active, the feedback resistance of the transimpedance amplifier is reduced to keep the output voltage constant. The transimpedance is regulated from 44 k at low currents (I < 2.5 A) to 200 at high currents (I < 500 A). Above 500 A the transimpedance is at its minimum and can not be reduced further but the front-end remains linear until input currents of 1.6 mA (p-p). The upper graph of Fig.6 shows the output voltages VOUT and VOUTQ of the TZA3033 as a function of the DC input current for a supply voltage of 3 V. In the lower graph the difference between both output voltages, Vo(dif), is shown for supply voltages of 3, 3.3 and 5 V. It can seen from the graph that the output changes linearly up to an input current of 2.5 A where the AGC becomes active. From this point on, the AGC tries to keep the differential output voltage constant around 110 mV for medium range input currents (input currents < 200 A). The AGC can not regulate for input currents above 500 A, and the output voltage rises again with the input current.
handbook, full pagewidth V
2.05
MGT562
o (V)
1.95
VOUT
1.85 VCC = 3 V 1.75 VOUTQ 1.65 300 Vo(dif) (mV) 200
(1) (2)
(3)
100
0 10 -1
1
10
102
103
I i (A)
104
(1) VCC = 3.0 V. (2) VCC = 3.3 V. (3) VCC = 5.0 V.
Fig.6 AGC characteristics.
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Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL VCC Vn supply voltage DC voltage pin 3/pad 5: IPhoto pins 6 and 7/pads 11 and 12: OUT and OUTQ pad 15: AGC (TZA3033U only) pin 1/pad 1: DREF In DC current pin 3/pad 5: IPhoto pins 6 and 7/pads 11 and 12: OUT and OUTQ pad 15: AGC (TZA3033U only) pin 1/pad 1: DREF Ptot Tstg Tj Tamb HANDLING total power dissipation storage temperature junction temperature ambient temperature -1 -15 -0.2 -2.5 - -65 - -40 +2.5 +15 +0.2 +2.5 300 +150 150 +85 -0.5 -0.5 -0.5 -0.5 +2 PARAMETER MIN. -0.5
TZA3033
MAX. +5.5 V V V V V
UNIT
VCC + 0.5 VCC + 0.5 VCC + 0.5
mA mA mA mA mW C C C
Precautions should be taken to avoid damage through electrostatic discharge. This is particularly important during assembly and handling of the bare die. Additional safety can be obtained by bonding the VCC and GND pads first, the remaining pads may then be bonded to their external connections in any order. THERMAL CHARACTERISTICS SYMBOL Rth(j-s) PARAMETER thermal resistance from junction to solder point VALUE 160 UNIT K/W
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Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
TZA3033
CHARACTERISTICS For typical values Tamb = 25 C and VCC = 5 V; minimum and maximum values are valid over the entire ambient temperature range and process spread; all voltages are measured with respect to ground; unless otherwise specified. SYMBOL VCC ICC PARAMETER supply voltage supply current AC coupled; RL = 50 VCC = 5 V VCC = 3.3 V Ptot Tj Tamb Rtr total power dissipation junction temperature ambient temperature small-signal transresistance of the receiver AC coupled; measured differentially RL = RL = 50 f-3dB(h) high frequency -3 dB point AC coupled; measured differentially; Ci = 0.7 pF; RL = 50 Tj = 125 C Tj = 100 C PSRR power supply rejection ratio measured differentially; note 1 f = 100 kHz to 10 MHz f = 100 MHz Bias voltage: pin DREF RDREF resistance between pins DREF and VCC DC tested 210 245 290 - - 0.5 10 - - A/V A/V 90 100 130 130 - - MHz MHz 42 21 90 45 112 66 k k VCC = 5 V VCC = 3.3 V 20 20 100 60 -40 -40 38 35 190 116 - +25 60 50 330 180 +125 +85 mA mA mW mW C C CONDITIONS 3 MIN. 5 TYP. MAX. 5.5 UNIT V
Input: pin IPhoto Vbias(IPhoto) input bias voltage on pin IPhoto Ii(IPhoto)(p-p) input current on pin IPhoto (peak-to-peak value) note 2 VCC = 5 V VCC = 3.3 V Ri In(tot) small-signal input resistance total integrated RMS noise current over bandwidth (referenced to input) fi = 1 MHz; input current < 0.5 A f = 90 MHz; note 3 0 0 - - 1 1 330 16 1800 1600 - - A A nA 800 1050 1300 mV
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Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
SYMBOL PARAMETER CONDITIONS MIN. TYP.
TZA3033
MAX.
UNIT
Data outputs: OUT and OUTQ Vo(cm) Vo(se)(p-p) VOO Ro(se) tr tf Ith(AGC) tatt(AGC) tdecay(AGC) Notes 1. PSRR is defined as the ratio of the equivalent current change at the input (IIPhoto) to a change in supply voltage: I IPhoto PSRR = -----------------V CC For example, a + 4 mV disturbance on VCC at 10 MHz will typically add an extra 2 nA to the photodiode current. The external capacitor between DREF and GND has a large impact on PSRR. The specification is valid with an external capacitor of 1 nF. The PSSR is guaranteed by design. 2. The Pulse Width Distortion (PWD) is <5% over the whole input current range. The PWD is defined as: pulse width PWD = ----------------------------- - 1 x 100% where T is the clock period. The PWD is measured differentially with T PRBS pattern of 10-23. 3. All In(tot) measurements were made with an input capacitance of Ci = 1 pF. This was comprised of 0.5 pF for the photodiode itself, with 0.3 pF allowed for the printed-circuit board layout and 0.2 pF intrinsic to the package. Noise performance is measured differentially. common mode output voltage AC coupled; RL = 50 single-ended output voltage (peak-to-peak value) differential output offset voltage single-ended output resistance rise time fall time VCC - 1.34 VCC - 1.15 VCC - 0.96 V 110 +55 +35 44 2.3 2.3 200 +150 +100 57 3.9 3.9 - - - mV mV mV ns ns A s ms AC coupled; RL = 50 ; 40 input current = 100 A(p-p) VCC = 5 V VCC = 3.3 V DC tested 20% to 80% 80% to 20% -50 -50 36 - - - - -
Automatic gain control loop: pad AGC AGC threshold current AGC attack time AGC decay time referred to the peak input current; tested at 10 MHz 2.5 5 10
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Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
TYPICAL PERFORMANCE CHARACTERISTICS
MGT549
TZA3033
handbook, halfpage
36.5
I CC (mA)
handbook, halfpage
50
MGT550
I CC (mA)
(1) (2) (3)
36.0
45
35.5
40
35.0
35
34.5
30
34.0 3.0
3.5
4.0
4.5
5.0 VCC (V)
5.5
25 -40
0
40
80
Tj (C)
120
(1) VCC = 5 V. (2) VCC = 3.3 V. (3) VCC = 3 V.
Fig.7
Supply current as a function of the supply voltage.
Fig.8
Supply current as a function of the junction temperature.
handbook, halfpage
1.055
MGT551
Vi (V)
handbook, halfpage
1.12
MGT552
Vi (V)
1.050
1.10
1.08 1.045 1.06 1.040 1.04 1.035
(1) (2) (3)
1.02
1.030 3.0
3.5
4.0
4.5
5.0 VCC (V)
5.5
1.00 -40
0
40
80
Tj (C)
120
(1) VCC = 5 V. (2) VCC = 3.3 V. (3) VCC = 3 V.
Fig.9
Input voltage as a function of the supply voltage.
Fig.10 Input voltage as a function of the junction temperature.
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Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
TZA3033
MGT553
handbook, halfpage
1.130
handbook, halfpage
Vo(cm) (V) 1.129
1.155 Vo(cm) (V) 1.145
MGT554
(1) (2)
1.135
(2) (1)
1.125 1.128 1.115
1.105 1.127 3.0 3.5 4.0 4.5 5.0 VCC (V) 5.5 1.095 -40 0 40 80 120
Tj (C)
(1) VCC - VOUT. (2) VCC - VOUTQ.
VCC = 5 V. (1) VCC - VOUT. (2) VCC - VOUTQ.
Fig.11 Common mode voltage at the output as a function of supply voltage.
Fig.12 The common mode voltage at the output as a function of the junction temperature.
APPLICATION INFORMATION
handbook, full pagewidth
10 H VP 22 nF VCC 8 DREF 1 7 OUTQ OUT Zo = 50 2 GND 4 GND 5 GND
MGR370
680 nF
Zo = 50
100 nF
TZA3033T
IPhoto 1 nF 6 3
100 nF R3 50 R4 50
Fig.13 Application diagram.
2002 Sep 06
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VCC
(1)
Philips Semiconductors
handbook, full pagewidth
SDH/SONET STM1/OC3 transimpedance amplifier
680 nF
(1)
(1)
22 nF VCC 8 DREF OUTQ 31 pF 6 OUT 10 nF DIN
100 nF VCCA 6 (11, 12) 7 4 (7)
135 k RSET 16 (30) CF 7 (13) Vref 15 (29) VCCD 14 (27, 28) (24) 13
100 nF
1
DOUT
100 nF
13
100 nF
TZA3033T
IPhoto 3
100 10 nF
TZA3034
DINQ 5 (8) (3, 4, 6, 9) (1, 14) 3 1 AGND SUB (16) 8 JAM (17) 9 STQ (23) 12 (18) (19, 20, 22, 25) 10 11 ST DGND DOUTQ
data out
100 nF noise filter: 1-pole, 100 MHz GND 64.4 nH 29.2 pF 4.5 pF 1 k 50 50 VCC - 2 V
2 GND
4 GND
5
level detect status
64.4 nH
MGT555
optional noise filter: 3-pole, 120 MHz Bessel
Product specification
TZA3033
(1) Ferrite bead e.g. Murata BLM10A700S.
Fig.14 STM1/OC3 receiver using the TZA3033 and TZA3034.
Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
Test circuits
TZA3033
handbook, full pagewidth
NETWORK ANALYZER
S-PARAMETER TEST SET PORT 1 Zo = 50 PORT 2 Zo = 50
VCC 100 nF PATTERN GENERATOR 223-1 PRBS DATA 10 nF 1 k R 51 OUT IN TZA3033T OUTQ GND 100 nF SAMPLING OSC 1 2 trigger input
223-1 PRBS CLOCK
Zo = 50
MGT556
Total impedance of the test circuit is ZT and is calculated by the equation ZT = S21 x (R + ZIN) x 2 where S21 is the insertion loss of ports 1 and 2. Typical values: R = 1 k, ZIN = 330 .
Fig.15 Test circuit.
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Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
TZA3033
handbook, full pagewidth
LIGHTWAVE MULTIMETER -9.54 dBm OPTICAL INPUT ERROR DETECTOR OPTICAL ATTENUATOR 0 dBm/1300 IN OUT 90% 10% VCC Zo = 50 BLM 22 nF 100 nF OUT Data in Clock in
223-1 PRBS PATTERN GENERATOR C C D D TR C IN DINQ Laser DREF LASER DRIVER DIN PIN 10 nF IPhoto SAMPLING OSCILLOSCOPE/ TDR/TDT TR 1 2
OUTQ 100 nF
TZA3033
TZA3041 OM5802
155.520 Mb/s
OM5804
Zo = 50
MGT557
Fig.16 Optical test circuit.
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Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
TZA3033
MGT558
handbook, full pagewidth
Fig.17 Differential output with -35 dBm optical input power [input current of 0.517 A (p-p)].
MGT559
handbook, full pagewidth
Fig.18 Differential output with -25 dBm optical input power [input current of 5.17 A (p-p)].
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Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
TZA3033
MGT560
handbook, full pagewidth
Fig.19 Differential output with -15 dBm optical input power [input current of 51.7 A (p-p)].
MGT561
handbook, full pagewidth
Fig.20 Differential output with -2 dBm optical input power [input current of 1030 A (p-p)].
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Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
BONDING PAD LOCATIONS
AGC VCC
TZA3033
SYMBOL DREF TESTA GND GND IPhoto TESTB GND GND GND GND OUT OUTQ VCC VCC AGC Note
PAD x 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 95 95 95 95 95 95 215 360 549 691 785 785 567 424 259 y 881 735 618 473 285 147 95 95 95 95 501 641 1055 1055 1055
IPhoto TESTB x GND 5 6 7 0 TESTA 1300 GND m GND 2 3 4 DREF 1
15
14
13
VCC
COORDINATES(1)
TZA3033U
12 11
OUTQ OUT
8 GND
9 GND 1030 m
10 GND
MGT563
0 y
1. All coordinates are referenced, in m, to the bottom left-hand corner of the die.
Fig.21 Bonding pad locations of the TZA3033U.
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Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
TZA3033
AGC
VCC 14
handbook, full pagewidth
15
13
DREF
1 2
VCC
1300 GND m GND
3 4
TZA3033U/G
12 11
OUTQ 725 m OUT
IPhoto
5 6 7 8 GND 9 GND 1030 m 10 GND
x 0 y GND 0
455 m
MCE068
Fig.22 Bonding pad plus gold plate locations of the TZA3033U/G.
Physical characteristics of the bare die PARAMETER Gold layer(1) Glass passivation Bonding pad dimension Metallization Thickness Size Backing Attach temperature Attach time Note 1. For the TZA3033U/G version only. 2.8 m Au + 3.2 m TiW 2.1 m PhosphoSilicate Glass (PSG) on top of 0.65 m oxynitride minimum dimension of exposed metallization is 90 x 90 m (pad size = 100 x 100 m) 1.22 m W/AlCu/TiW 380 m nominal 1.03 x 1.30 mm (1.34 mm2) silicon; electrically connected to GND potential through substrate contacts <440 C; recommended die attach is glue <15 s VALUE
2002 Sep 06
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Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
PACKAGE OUTLINE SO8: plastic small outline package; 8 leads; body width 3.9 mm
TZA3033
SOT96-1
D
E
A X
c y HE vMA
Z 8 5
Q A2 A1 pin 1 index Lp 1 e bp 4 wM L detail X (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 5.0 4.8 0.20 0.19 E (2) 4.0 3.8 0.16 0.15 e 1.27 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3
0.010 0.057 0.069 0.004 0.049
0.019 0.0100 0.014 0.0075
0.244 0.039 0.028 0.050 0.041 0.228 0.016 0.024
0.028 0.004 0.012
8 0o
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT96-1 REFERENCES IEC 076E03 JEDEC MS-012 EIAJ EUROPEAN PROJECTION
ISSUE DATE 97-05-22 99-12-27
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Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 220 C for thick/large packages, and below 235 C for small/thin packages. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed.
TZA3033
If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
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Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
Suitability of surface mount IC packages for wave and reflow soldering methods PACKAGE(1) BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS PLCC(4), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes not suitable not suitable(3)
TZA3033
SOLDERING METHOD WAVE REFLOW(2) suitable suitable suitable suitable suitable
suitable not not recommended(4)(5) recommended(6)
1. For more detailed information on the BGA packages refer to the "(LF)BGA Application Note" (AN01026); order a copy from your Philips Semiconductors sales office. 2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 4. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 5. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 6. Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2002 Sep 06
22
Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
DATA SHEET STATUS DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2) Development DEFINITIONS
TZA3033
This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Preliminary data
Qualification
Product data
Production
Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
2002 Sep 06
23
Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
TZA3033
Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Bare die All die are tested and are guaranteed to comply with all data sheet limits up to the point of wafer sawing for a period of ninety (90) days from the date of Philips' delivery. If there are data sheet limits not guaranteed, these will be separately indicated in the data sheet. There are no post packing tests performed on individual die or wafer. Philips Semiconductors has no control of third party procedures in the sawing, handling, packing or assembly of the die. Accordingly, Philips Semiconductors assumes no liability for device functionality or performance of the die or systems after third party sawing, handling, packing or assembly of the die. It is the responsibility of the customer to test and qualify their application in which the die is used.
2002 Sep 06
24
Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
NOTES
TZA3033
2002 Sep 06
25
Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
NOTES
TZA3033
2002 Sep 06
26
Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 transimpedance amplifier
NOTES
TZA3033
2002 Sep 06
27
Philips Semiconductors - a worldwide company
Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
(c) Koninklijke Philips Electronics N.V. 2002
SCA74
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
403510/03/pp28
Date of release: 2002
Sep 06
Document order number:
9397 750 10127

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